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US6753250: Method of fabricating low dielectric constant dielectric films

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Filing Information

Inventor(s) Richard S. Hill · Willibrordus Gerardus Maria van den Hoek · Robert H. Havemann ·
Assignee(s) Novellus Systems, Inc. ·
Attorney/Agent(s) Beyer Weaver & Thomas, LLP ·
Primary Examiner Dung A. Le ·
Application Number US10171289
Filing date 06/12/2002
Issue date 06/22/2004
Predicted expiration date 06/12/2022
U.S. Classifications 438/637  · 438/673  · 438/672  · 438/638  ·
International Classifications --
Kind CodeB1
International Classifications 438637-639 · 438622-628 · 438672-674 · 438618 ·
48 Claims, 10 Drawings


Abstract

Porous dielectric layers are produced by introducing small vertical or columnar gaps in pre-formed layers of dense dielectric. The pores may be formed by a special process that is different from the processes employed to form metal lines and other features on a VLSI device. Further, the columnar gaps may be produced after the planarization process for a particular layer has been completed. Then, after the pores are formed, they are capped by depositing another layer of material. In this manner, the newly porous layer is protected from direct exposure to the pressure of subsequent planarization processes. In alternative embodiments, the processes described herein are applied to introduce pores into a preformed layer of semiconductor to produce a porous semiconductor layer.

Independent Claims | See all claims (48)

  1. 1. A method of forming a low dielectric constant dielectric layer in a semiconductor device, the method comprising: (a) depositing dielectric and conductive material to form a pattern of conductive lines in a dielectric layer; (b) planarizing the semiconductor device to produce an exposed pattern of the conductive lines in the dielectric layer, wherein the conductive lines have a defined line width; (c) after (b), removing or leaving columnar regions of dielectric in the dielectric layer, wherein the columnar regions have an average feature dimension substantially smaller than the defined line width; and (d) depositing material over the columnar regions to form gaps in the dielectric material and thereby lower an effective dielectric constant of the dielectric layer.
  2. 26. A method of forming a layer of low dielectric constant dielectric in a semiconductor device, the method comprising: (a) providing a layer of dielectric having a pattern of conductive features located therein; (b) providing a mask over the layer of dielectric, wherein the mask has self-forming exposed regions that are not aligned with the pattern of conductive features; and (c) etching away columnar regions of the layer of dielectric defined by the exposed regions to form the low dielectric constant dielectric, while not substantially etching the conductive features.
  3. 40. A method of forming a layer of low dielectric constant dielectric in a semiconductor device, the method comprising: (a) providing a layer of dielectric having a pattern of conductive features located therein; (b) providing a mask over the layer of dielectric, wherein the mask has exposed regions that are not aligned with any features of the semiconductor device; and (c) etching away columnar regions of the layer of dielectric defined by the exposed regions to form the low dielectric constant dielectric, while not substantially etching the conductive features.
  4. 47. A method of forming a layer of low dielectric constant semiconductor in a device, the method comprising: (a) providing a region of exposed semiconductor on the device; (b) providing a mask over the region of semiconductor, wherein the mask has self-forming exposed regions that are not aligned with any features of the device; and (c) etching away columnar regions of semiconductor defined by the exposed regions to form the low dielectric constant semiconductor.

References Cited

U.S. Patent Documents

Document NumberAssigneesInventorsIssue/Pub Date
US5920790* Motorola, Inc. Wetzel et al. Jul 1999
US6177329 Pang Jan 2001
US6268276 Chartered Semiconductor Manufacturing Ltd. Chan et al. Jul 2001
US6329062 Novellus Systems, Inc. Gaynor Dec 2001
US20030119307* Applied Materials, Inc. Bekiaris et al. Jun 2003

Foreign Patent Documents

Document NumberAssigneesInventorsIssue/Pub Date
WO199507543Mar 1995
* cited by examiner

Other Publications

“Shipley Claims Porous Low K Dielectric Breakthrough,” Press Release Mar. 17, 2003.
R.D. Miller et al., “Phase-Separated Inorganic-Organic Hybrids for Microelectronic Applications,” MRS Bulletin, Oct. 1997, pp. 44-48.
Jin et al., “Nanoporous Silica as an Ultralow-k Dielectric,” MRS Bulletin, Oct. 1997, pp. 39-42.
Cleemput et al., “Dielectric Films With Low Dielectric Constants,” Application Ser. No.: 09/727,796, filed Nov. 30, 2000.
Asoh et al., “Fabrication of Ideally Ordered Anodic Porous Alumina with 63 nm Hole Periodocity Using Sulfuric Acid,” J. Vac. Sci. Technol. B 19(2), Mar./Apr. 2001, pp. 569-572.
Asoh et al., “Conditions for Fabrication of Ideally Ordered Anodic Porous Alumina Using Pretextured AI,” Journal of the Electrochemica Society, 148 (4) B152-B156 (2001) pp. B152-B156.
Holland et al., “Nonlithographic Technique for the Production of Large Area High Density Gridded Field Sources,” J. Vac. Sci. Technol. B 17(2), Mar./Apr. 1999, pp. 580-582.
Masuda et al. “Highly Ordered Nanochannel-Array Architecture in Anodic Alumina,” App. Phys. Lett. 71(19), Nov. 1997, pp. 2770-2772.
Clube et al., White Paper from Holotronic Technologies SA; downloaded from www.hdotronic.com/whitepaper/fine-patt.pdf on Mar. 12, 2002.
Meli et al., “Self-Assembled Masks for the Transfer of Nanometer-Scale Patterns into Surfaces: Characterization by AFM and LFM” Nano Letters, vol. 2, No. 2, 2002, 131-135.

Referenced By

Document NumberAssigneeInventorsIssue/Pub Date
DE102004040798 INFINEON TECHNOLOGIES AG GUTSCHE MARTIN ULRICH et al. Mar 2006
US8603319 --
US6905950 Advanced Micro Devices, Inc. Ramkumar Subramanian et al. Jun 2005
US7510982 Novellus Systems, Inc. Nerissa S. Draeger et al. Mar 2009
US7588677 Micron Technology, Inc. Whonchee Lee et al. Sep 2009
US7033944 Samsung Electronics Co., Ltd. Wan-Jae Park et al. Apr 2006
US7153777 Micron Technology, Inc. Whonchee Lee Dec 2006
US7389023 Hewlett-Packard Development Company, L.P. Jong-Souk Yeo et al. Jun 2008
US7074113 Micron Technology, Inc. Scott E. Moore Jul 2006
US7134934 Micron Technology, Inc. Whonchee Lee et al. Nov 2006
US7148142 Advanced Micro Devices, Inc. Srikanteswara Dakshina-Murthy et al. Dec 2006
US7160176 Micron Technology, Inc. Whonchee Lee et al. Jan 2007
US7112122 Micron Technology, Inc. Whonchee Lee et al. Sep 2006
US7166531 Novellus Systems, Inc. Willibrordus Gerardus Maria van den Hoek et al. Jan 2007
US7604729 Micron Technology, Inc. Whonchee Lee et al. Oct 2009
US6995439 Novellus Systems, Inc. Richard S. Hill et al. Feb 2006
US6881664 LSI Logic Corporation Wilbur G. Catabay et al. Apr 2005
US7153410 Micron Technology, Inc. Scott E. Moore et al. Dec 2006
US7241695 Freescale Semiconductor, Inc. Leo Mathew et al. Jul 2007
US7094131 Micron Technology, Inc. Whonchee Lee et al. Aug 2006
US6905955 Micron Technology, Inc. Cem Basceri et al. Jun 2005
US7192335 Micron Technology, Inc. Whonchee Lee et al. Mar 2007
US7566391 Micron Technology, Inc. Whonchee Lee et al. Jul 2009
US7618528 Micron Technology, Inc. Whonchee Lee et al. Nov 2009
US7078308 Micron Technology, Inc. Whonchee Lee et al. Jul 2006
US7220166 Micron Technology, Inc. Whonchee Lee et al. May 2007
US7524410 Micron Technology, Inc. Whonchee Lee et al. Apr 2009
US7670466 Micron Technology, Inc. Whonchee Lee Mar 2010
US7700436 Micron Technology, Inc. Whonchee Lee et al. Apr 2010
US7709373 Advanced Micro Devices, Inc. Srikanteswara Dakshina-Murthy et al. May 2010
US7749896 Taiwan Semiconductor Manufacturing Co., Ltd. Hung-Wen Su et al. Jul 2010
US7825516 International Business Machines Corporation Stefanie Ruth Chiras et al. Nov 2010
US7837888 Cabot Microelectronics Corporation Paul M. Feeney et al. Nov 2010
US7129160 Micron Technology, Inc. Dinesh Chopra Oct 2006
US7153195 Micron Technology, Inc. Whonchee Lee et al. Dec 2006
US7112121 Micron Technology, Inc. Whonchee Lee et al. Sep 2006
US7560017 Micron Technology, Inc. Whonchee Lee et al. Jul 2009
US7972485 Round Rock Research, LLC Whonchee Lee et al. Jul 2011
US8048756 Micron Technology, Inc. Whonchee Lee et al. Nov 2011
US8101060 Round Rock Research, LLC Whonchee Lee Jan 2012

Patent Family

Document NumberAssigneeInventorsIssue/Pub Date
US6753250 Novellus Systems, Inc. Richard S. Hill et al. Jun 2004
US6995439 Novellus Systems, Inc. Richard S. Hill et al. Feb 2006