Join
today

Boliven PRO is more than just patent search

  • Build and save lists using the powerful Lists feature
  • Analyze and download your search results
  • Share patent search results with your clients

Patents »

US7065419: Job flow Petri Net and controlling mechanism for parallel processing

Share

Filing Information

Inventor(s) Chuan-Jen Wu · Chyuarn-Yuh Dai · Tien-Hsiang Sun ·
Assignee(s) Taiwan Semiconductor Manufacturing Company, Ltd. ·
Attorney/Agent(s) Haynes and Boone, LLP ·
Primary Examiner Ramesh Patel ·
Application Number US10823867
Filing date 04/14/2004
Issue date 06/20/2006
Prior Publication Data
Predicted expiration date 04/16/2024
Patent term adjustment 2
U.S. Classifications 700/97  · 700/110  · 700/100  · 700/108  · 700/109  · 700/99  · 706/4  · 706/10  · 706/16  · 700/96  ·
International Classifications G06F1900  ·
Kind CodeB2
13 Claims, 5 Drawings


Abstract

The present disclosure provides a job flow system for use in a manufacturing environment, such as a semiconductor fab. The job flow system includes a plurality of sequence-related jobs associated with the manufacturing and a computer-controlled Petri Net structure. The Petri Net structure includes a plurality of agents associated with each of the sequence-related jobs. The Petri Net structure also includes a plurality of application processes to be performed by the agents, one or more description files, and a PN Center for loading the one or more description files and activating a first agent to perform one or more of the application processes in response to the one or more description files and in response to process status information from application processes.

Independent Claims | See all claims (13)

  1. 1. A computerized method for controlling parallel distributed processes in a manufacturing environment, the method comprising the steps of: providing a plurality of places associated with a plurality of process conditions, wherein each place has at most one input path and at most one output path; providing a token for identifying the status of at least one of the plurality of process conditions; connecting the places with a plurality of arcs, the arcs adapted for identifying a route for each token, and wherein each place includes at most one input path and at most one output path; identifying conditions from the plurality of process conditions for each token to advance along one of the paths to a different place.
  2. 4. A computer-implemented job flow system for use in a manufacturing environment, the system comprising a plurality of sequence-related jobs associated with manufacturing and computer-controlled Petri-Net (PN) structure comprising: a plurality of agents associated with each of the sequence-related jobs; a plurality of application processes to be performed by the agents; one or more description files, wherein a plurality of conditions are respectively represented by one of a plurality of places, and wherein each place has at most one input path and at most one output path; and a PN Center for loading the one or more description files and activating a first agent to perform one or more of the application processes in response to the one or more description files and in response to status information from at least one of the application processes.
  3. 13. A computer program stored on a recordable medium and for use in monitoring and controlling a plurality of computer-controlled semiconductor data collection/summary processes, the computer program including instructions for: reporting the process status to a PN Center, the PN Center providing requests to the plurality of computer-controlled semiconductor data collection/summary processes; and activating transitions associated with a PN description file, the transitions activated by the PN Center and associated with the plurality of computer-controlled semiconductor data collection/summary processes, wherein a plurality of conditions are respectively represented by one of a plurality of places, and wherein each place has at most one input path and at most one output path.

References Cited

U.S. Patent Documents

Document NumberAssigneesInventorsIssue/Pub Date
US5050088 Eastman Kodak Company Buckler et al. Sep 1991
US5121003 HaL Computer Systems, Inc. Williams Jun 1992
US5283896* International Business Machines Corporation Temmyo et al. Feb 1994
US5513132 Hal Computer Systems, Inc. Williams Apr 1996
US5555179 Ltd. Hitachi Koyama et al. Sep 1996
US5671151 Hal Computer Systems, Inc. Williams Sep 1997
US6286033 Genesys Telecommunications Laboratories, Inc. Kishinsky et al. Sep 2001
US6314553 Intel Corporation Stevens et al. Nov 2001
US6349237* The Regents of the University of Michigan Koren et al. Feb 2002
US6349238 MCI WorldCom, Inc. Gabbita et al. Feb 2002
US6421808 Cadance Design Systems, Inc. McGeer et al. Jul 2002
US6833514* Gesuita et al. Dec 2004
US20030018512* Dortmans Jan 2003
US20040006584* Vandeweerd Jan 2004
US20040088678* International Business Machines Corporation Litoiu et al. May 2004

Foreign Patent Documents

Document NumberAssigneesInventorsIssue/Pub Date
JP0756886Mar 1995
* cited by examiner

Other Publications

Hyun Joong Yoon et al., “Identification of Potential Deadlock Set in Semiconductor Track Systems”, Proceedings of the 2001 IEEE Int'l Conference on Robotics & Automation, May 21-26, 2001, pp. 1820-1825, Seoul, Korea.
Jin Young Choi et al., “A Generalized Stochastic Petri net Model for Performance Analysis and Control of Capacited Re-entrant Lines”, IEEE Transactions on R&A, 2003, 9 pgs., vol. XX.
Robert Esser, et al., “Applying an Object-Oriented Petri Net Language to Heterogeneous Systems Design”, 9 pgs.
Mark LaPedus, “Is e-diagnostics dead or alive in the industry?”, Silicon Strategies, Jul. 15, 2003, 3 pgs., Semiconductor Business News.
Mu Der Jeng et al., Modeling, Qualitative Analysis, and Performance Evaluation of the Etching Area in an IC Wafer Fabrication System Using Petri Nets, IEEE Transaction on Semiconductor Manufacturing, vol. II, No. 3, 16 pgs., Aug., 1998.
R. S. Srinivasan, Modeling and Performance Analysis of Cluster Tools Using Petri Nets, IEEE Transactions on Semiconductor Manufacturing, vol. II, No. 3, 10 pgs., Aug. 1998.
Mengchu Zhou et al., “Modeling, Analysis, Simulation, Scheduling, and Control of Semiconductor Manufacturing Systems: A Petri Net Approach”, IEEE Transactions of Semiconductor Manufacturing, vol. II, No. 3, 25 pgs., Aug. 1998.

Referenced By

Document NumberAssigneeInventorsIssue/Pub Date
US7577627 Oracle International Corporation Ravi Ramkissoon et al. Aug 2009
US7950011 Oracle International Corporation Raghu Mani et al. May 2011
US8391998 --

Patent Family