Apparatus for reducing computer system power consumption

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Filing Information

  • Patent Number: USRE36189
  • Application Number: US7993093
  • Filing date: 12/18/1992
  • Issue date: 04/13/1999
  • Predicted expiration date: 12/18/2012
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  • U.S. Classifications: 395/750.06  · 395/750.05  ·
  • International Classifications: G06F 132 ·
  • International Classifications: 324600;76.11 ·
13 Claims, No Drawings


Abstract

A battery powered computer system monitors the address bus to determine when selected peripheral devices have not been accessed for a preset amount of time. When the preset amount of time has passed the system powers itself down and stops the system clock, placing it in a standby mode. The system is awakened by depressing a standby switch, unless there is insufficient energy in the batteries, under which circumstances an AC power source must be connected before the system can be awakened.

References Cited

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Independent Claims | See all claims (13)

  1. 1. An apparatus for use with a battery powered computer system for reducing power consumption of the battery powered computer system, the computer system including various circuitry, portions of which is clocked, the apparatus comprising:an address and data bus for communicating address and data information in the computer system;a plurality of peripheral devices coupled to said address and data bus, said peripheral devices being accessed over said address and data bus by use of address values associated with each said peripheral device, each said peripheral device capable of being powered off;means coupled to said address and data bus for accessing said peripheral devices by presenting address values associated with said particular peripheral device on said address and data bus;means coupled to said address and data bus for analyzing the address values presented on said address bus by said means for accessing to determine if one of said peripheral devices is being accessed and producing a signal indicative thereof;means coupled to said address value analyzing means and responsive to said address value analyzing means signal for timing an interval since any one of said peripheral devices has been accessed by said accessing means; andmeans coupled to said timing means and said peripheral devices for powering off said peripheral devices when said interval exceeds a preset amount to enter a reduced power consumption state.